288 pp. per issue
6 x 9, illustrated
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Neural Computation

July 1993, Vol. 5, No. 4, Pages 648-664
(doi: 10.1162/neco.1993.5.4.648)
© 1993 Massachusetts Institute of Technology
Artificial Dendritic Trees
Article PDF (1.17 MB)

The electronic architecture and dynamic signal processing capabilities of an artificial dendritic tree that can be used to process and classify dynamic signals is described. The electrical circuit architecture is modeled after neurons that have spatially extensive dendritic trees. The artificial dendritic tree is a hybrid VLSI circuit and is sensitive to both temporal and spatial signal characteristics. It does not use the conventional neural network concept of weights, and as such it does not use multipliers, adders, look-up-tables, microprocessors, or other complex computational units to process signals. The weights of conventional neural networks, which take the form of numerical, resistive, voltage, or current values, but do not have any spatial or temporal content, are replaced with connections whose spatial location have both a temporal and scaling significance.