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Abstract:
Experimental data has shown that synaptic strength
modification in some types of biological neurons depends upon
precise spike timing differences between presynaptic and
postsynaptic spikes. Several temporally-asymmetric Hebbian
learning rules motivated by this data have been proposed. We
argue that such learning rules are suitable to analog VLSI
implementation. We describe an easily tunable circuit to modify
the weight of a silicon spiking neuron according to those
learning rules. Test results from the fabrication of the circuit
using a 0.6μm CMOS process are given.
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